design¶
wield.control.SISO.design
Functions for designing and synthesizing SISO filters
Functions
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Create a thiran filter to simulate a delay line with maximally flat group delay for a given filter order. |
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Return a square root filter |
Details
- delay_thiran_raw(delay_s, order=None, fmax=None)[source][github]¶
Create a thiran filter to simulate a delay line with maximally flat group delay for a given filter order.
This is done by generating the poles of a Bessel filter - which has maximally flat group delay for a low-pass filter. The poles are then rescaled to generate the desired delay and then right-plane zeroes are created to mirror the poles. This generates an all-pass filter with constant gain and constant delay. This implementation can create filters to very high order of 100 poles or more.
In general, the order indicates how many multiples of 180deg that the phase can advance. The phase advances 360deg (2 poles equivalent) every F = 1/delay_s
So if F_max is the maximum frequency of concern for your system, the order should be F_max * delay_s * 2 + 1
This function will take the maximum of the requested order or the order computed from fmax
- root_factored_quadrature_sum(*filts)[source][github]¶
Return a square root filter
TODO, make this numerically better behaved and test its output.
This should actually be implemented using spectral factorization using and ARE. But debugging that sounds hard. This should be similarly robust but is not a general method.